? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 1 tel:805-498-2111 fax:805-498-3804 web:http:// www.semtech.com description intended for applications such as power managed pci, the SC1532 is designed to maintain a glitch-free 3.3v output when at least one of two inputs, 5v (vin1) and 3.3v (vin2), is present. the SC1532 combines a 5v to 3.3v linear regulator with an integral 3.3v bypass switch, along with logic and detection circuitry to control which supply provides the power for the output. whenever vin1 exceeds a predetermined threshold value, the internal 3.3v pmos linear regulator is en- abled, and the internal pass nmos is turned off. when vin1 falls below a lower threshold value, the nmos pass device is turned on and the pmos linear regulator is turned off. this ensures an uninterrupted 3.3v output even if vin1 falls out of specification. when both supplies are simultaneously available, the pmos linear regulator will be turned on, and the nmos pass will be turned off, thus preferentially sup- plying the output from the 5v supply. the internal 5v detector has its upper threshold (for vin1 rising) set to 4.18v (typical) while the lower threshold (for vin falling) is at 4.1v (typical) giving a hysteresis of approximately 80mv. the SC1532 is available in the popular so-8 surface mount package. features ? glitch-free transition between input sources ? internal logic selects input source ? 5v detector with hysteresis ? 1% regulated output voltage accuracy ? 400ma load current capability applications ? desktop computers ? network interface cards (nics) ? pcmcia/pci interface cards ? peripheral cards ordering information part number (1) package SC1532cs so-8 note: (1) add suffix ?tr? for tape and reel packaging. typical application circuit 3.3vaux in 5v in 3.3v out u1 SC1532 1 2 3 4 5 6 7 8 vin2 vin1 vo cp gnd gnd gnd gnd c4 1nf c1 4.7uf c2 4.7uf c3 4.7uf notes: (1) ceramic capacitors are recommended - see applications information for further details. (2) output capacitor c3 needs to be 1.0uf or greater for stability. additional capacitance (tantalum or ceramic) will improve overall performance.
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 2 note: (1) 1 inch square of 1/16? fr-4, double sided, 1 oz. minimum copper weight. absolute maximum ratings parameter symbol maximum units input supply voltages vin1, vin2 -0.5 to +7 v charge pump capacitor pin voltage cp -0.5 to +16 v output current i o 400 ma operating ambient temperature range t a -5 to +70 c operating junction temperature range t j -5 to +125 c storage temperature range t stg -65 to +150 c lead temperature (soldering) 10 sec t lead 300 c thermal impedance junction to ambient (1) ja 65 c/w esd rating (human body model) esd 4 kv electrical characteristics unless specified, t a = 25c, vin1 = 5v, vin2 = 3.3v, i o = 400ma, cin1 = 4.7uf, cin2 = 4.7uf, c o = 4.7uf, cp=1nf. values in bold apply over full operating temperature range. parameter symbol test conditions min typ max units vin1 supply voltage vin1 vin2 = 0v 4.3 5.0 5.5 v quiescent current i q1 vin1 = 5v, 0v vin2 3.6v, i o = 0ma 2.0 3.0 ma 4.0 reverse leakage from vin2 (1) i vin1 vin1 = 0v, vin2 = 3.6v, i o = 0ma 0 1 a vin2 supply voltage vin2 3.0 3.3 3.6 v quiescent current i q2 vin2 = 3.3v, 0v vin1 5.5v, i o = 0ma 650 1300 a 2000 reverse leakage from vin1 (1) i vin2 vin1 = 5.5v, vin2 = 0v, i o = 0ma 0 1 a 5v detect (1)(2) low threshold voltage v th(lo) vin1 falling, i o = 20ma 3.90 4.10 v hysteresis v hyst i o = 20ma 60 80 150 mv high threshold voltage v th(hi) vin1 rising, i o = 20ma 4.18 4.30 v
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 3 notes: (1) guaranteed by design. (2) recommended source impedance for 5v supply: 0.125 ? . this will ensure clean transitions between supplies with no ?chattering? (see applications information). (3) refer to block diagram. electrical characteristics (cont.) unless specified, t a = 25c, vin1 = 5v, vin2 = 3.3v, i o = 400ma, cin1 = 4.7uf, cin2 = 4.7uf, c o = 4.7uf, cp=1nf. values in bold apply over full operating temperature range. parameter symbol test conditions min typ max units vo ldo voltage accuracy vo i o = 20ma -1 +1 % 4.3v vin1 5.5v, 0ma i o 400ma (1) -2 +2 3.90v vin1 4.3v, vin2 = 3.3v, 0ma i o 400ma (1) 3.000 v vin2 pass device on resis- r ds(on) vin1 < 3.9v, 0ma i o 400ma 360 500 m ? tance (aux. nmos) (1)(3) line regulation reg (line) vin1 = 4.3v to 5.5v 0.3 0.6 % 0.7 load regulation reg (load) i o = 20ma to 400ma 0.3 0.6 % 0.7 current limit (ldo) output current i lim vin1 = 5v, vin2 = 0v, vo = 0v 600 975 1200 ma 1400 over temperature protection high trip level t hi vin1=5v 175 oc hysteresis t hys vin1=5v 10 oc
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 4 top view (so-8) pin descriptions pin pin name pin function 1 vin2 secondary input supply, nominally 3.3v. 2 vin1 main input supply for the ic, nominally 5v. 3 vo 3.3v out. 4 cp charge pump capacitor connection. 5 gnd ground pin. 6 gnd ground pin. 7 gnd ground pin. 8 gnd ground pin. pin configuration block diagram
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -25 0 25 50 75 100 125 t j (c) reg (load) (%) vin1 = 5v vin2 = 3.3v i o = 20ma to 400ma 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -25 0 25 50 75 100 125 t j (c) reg (line) (%) vin1 = 4.3v to 5.5v i o = 400ma 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -25 0 25 50 75 100 125 t j (c) i q1 (ma) vin1 = 5v i o = 0ma vin2 = 3.6v vin2 = 0v typical characteristics quiescent current (i q1 ) vs. junction temperature vs. vin2 0 100 200 300 400 500 600 700 800 -25 0 25 50 75 100 125 t j (c) i q2 (a) vin1 = 0v vin1 = 5.5v vin2 = 3.3v i o = 0ma quiescent current (i q2 ) vs. junction temperature vs. vin1 ldo line regulation vs. junction temperature ldo load regulation vs. junction temperature 3.270 3.275 3.280 3.285 3.290 3.295 3.300 3.305 3.310 -25 0 25 50 75 100 125 t j (c) v o (v) i o = 0ma i o = 200ma i o = 400ma vin1 = 5v vin2 = 3.3v ldo output voltage vs. junction temperature vs. output current 0 200 400 600 800 1000 1200 -25 0 25 50 75 100 125 t j (c) i lim (ma) vin1 = 5v vin2 = 0v vo = 0v ldo current limit vs. junction temperature
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 6 0 50 100 150 200 250 300 350 400 450 500 -25 0 25 50 75 100 125 t j (c) r ds(on) (m ? ? ? ? ) vin1 = 0v vin2 = 3.3v i o = 400ma typical characteristics (cont.) vin2 pass device on resistance vs. junction temperature 3.90 3.95 4.00 4.05 4.10 4.15 4.20 4.25 4.30 -25 0 25 50 75 100 125 t j (c) v th (v) vin2 = 3.3v i o = 20ma v th(hi) v th(lo) 5v detect threshold voltage vs. junction temperature vo (min) with vin1 rising (1)(2) trace 1: vo, offset 3.3v, 100mv/div. trace 2: vin1 rising through v th(hi) , 2v/div. vo (min) = 3.11v vo (min) with vin1 falling (1)(2) trace 1: vo, offset 3.3v, 100mv/div. trace 2: vin1 falling through v th(lo) , 2v/div. vo (min) = 3.05v notes: (1) in application circuit on page 1. (2) r l = 8.2 ?.
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 7 typical characteristics (cont.) transient load response (1) trace 1: vo, offset 3.3v, 50mv/div. trace 2: i o stepping from 0ma to 400ma notes: (1) in application circuit on page 2. applications information introduction the SC1532 is intended for applications such as power managed pci and network interface cards (nics), where operation from a 3.3v vaux supply may be re- quired when the 5v supply has been shut down. it pro- vides a simple, low cost solution that uses very little pcb real estate. during regular operation, 3.3v power for the pci card is provided by the SC1532?s on-board low dropout regulator, generated from the 5v supply. when the 5v supply is removed and 3.3v vaux is available, the SC1532 connects this supply directly to its output using an internal nmos pass device. component selection output capacitors - semtech recommends a 4.7f or greater ceramic capacitor at the output for the best combination of performance and cost effectiveness. increasing the capacitance value improves transient response and glitch performance. the SC1532 is very tolerant of output capacitor value and esr variations, in fact any combination of capacitors with c 1f and esr < 1 ? is sufficient for stability. this target is easily met using surface mount ceramic or tantalum capaci- tors. input capacitors - semtech recommends the use of a 4.7f ceramic capacitor at both inputs. this allows for the device being some distance from any bulk capaci- tance on the rail. additionally, input droop due to load transients is reduced, improving load transient re- sponse and aiding smooth supply transitions. tanta- lum capacitors should not be used. charge pump capacitor - semtech recommends the use of a 1nf ceramic capacitor between cp and gnd. thermal considerations when operating from the 5v supply, the power dissipa- tion in the SC1532 is approximately equal to the prod- uct of the output current and the input to output voltage differential: the absolute worst-case dissipation is given by: note that the vin2 (max) x i q2(max) term does not apply if vin2 is not supplied. () o d i vo 1 vin p ? ? () ) max ( 2 q ) max ( ) max ( 1 q ) max ( ) max ( o ) min ( ) max ( ) max ( d i 2 vin i 1 vin i vo 1 vin p ? + ? + ? ? =
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 8 applications information (cont.) inserting vin1 = 5.5v, vo = 3.234v, i o = 400ma, vin2 = 3.6v, i q1 = 4ma and i q2 = 2ma yields: using this figure, we can calculate the maximum ther- mal impedance allowable to maintain t j 125c at an ambient temperature of 55c: this is readily achievable using pcb copper area to aid in conducting the heat away from the device (see fig- ure 1 below). vin1 source impedance in order to ensure seamless transitions between sup- plies with vin1 rising and falling, it is recommended that the source impedance of vin1 is less than 0.125 ? . this is because as the output current switches from vin1 to vin2 and visa-versa, the sup- plies can ?chatter? if: in general, this can be avoided by minimizing supply trace lengths and resistances. in circumstances where the source impedance is causing supply ?chattering?, increasing the value of the vin1 input capacitor should solve the problem by reducing the instantaneous drop or jump in vin1 as the supplies are switched. layout considerations while layout for linear devices is generally not as criti- cal as for a switching application, careful attention to detail will ensure reliable operation. see figure 1 below for a sample layout. 1) attaching the part (pins 5 to 8) to a larger copper footprint will enable better heat transfer from the de- vice, especially on pcbs where there are internal ground and power planes. 2) place the input and output capacitors close to the device for optimal transient response. () () w / c 75 936 . 0 55 125 p t t r ) max ( d ) max ( a ) max ( j ) max )( a j ( th = ? = ? = ? fig. 1: suggested pcb layout based upon application circuit on page 1. notes: (1) all vias go to ground plane. (2) copper area on pins 5 thru 8 is recommended, 0.5? x 0.5? area only is shown. connect to the ground plane with a via or vias. hyst source o v r i > ? w 936 . 0 p ) max ( d = top copper top silk screen
? 2000 semtech corp. 652 mitchell road newbury park ca 91320 400ma smartldo tm with internal pass mosfet SC1532 january 3, 2000 9 outline drawing - so-8 jedec ref: ms-012aa minimum land pattern - so-8 ecn99-789
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